Path: utzoo!attcan!uunet!xavax!alvitar
From: alvitar@xavax.com (Phillip Harbison)
Newsgroups: comp.arch
Subject: Re: Register Allocation and Aliasing
Keywords: optimize, analysis
Message-ID: <1990Jul9.073203.3358@xavax.com>
Date: 9 Jul 90 07:32:03 GMT
Sender: alvitar@xavax.com
Followup-To: comp.arch
Organization: Xavax
Lines: 24

In article <1990Jul05.155937.13214@esegue.segue.boston.ma.us>
aglew@oberon.crhc.uiuc.edu (Andy Glew) writes:
> How often are quantities that *might* be allocated to registers *not*
> allocated to registers, because of the remote *possibility* of
> aliasing via some circuitous pointers?
>
>   Hare brained idea: allocate quantities that *might* be aliased to
> registers anyway.  Provide a register to contain the true memory
> address of the aliased quantity, which causes a trap when the address
> is accessed (or automagically forwards to/from the register).

This sounds like an interesting idea.  What if we just added a tag
to each register in the CPU.  The tag would store the address which
the register represents.  A valid bit would be set if the tag was
in use, and cleared for empty or scratch registers.  A dirty bit
could be set when the register was not consistent with memory.  All
load/store instructions would have to check the tags, so the tags
would have to be fully associative.  Registers with the dirty bit
set could be automatically written back when they were reused.

-- 
Live: Phil Harbison, Xavax, P.O. Box 7413, Huntsville, AL 35807
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