Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!uwm.edu!wuarchive!zaphod.mps.ohio-state.edu!swrinde!ucsd!ucbvax!agate!shelby!portia.stanford.edu!dhinds
From: dhinds@portia.Stanford.EDU (David Hinds)
Newsgroups: comp.sys.ibm.pc
Subject: Re: QEMM 5.0 Slo-o-o-o-ws system DMA
Message-ID: <1990Jul6.173231.18410@portia.Stanford.EDU>
Date: 6 Jul 90 17:32:31 GMT
References: <3863@trantor.harris-atd.com> <1470013@iftccu.ca.boeing.com>
Organization: AIR, Stanford University
Lines: 20

In article <1470013@iftccu.ca.boeing.com> bressler@iftccu.ca.boeing.com (Rick Bressler) writes:
>
>Now in V86 mode you have all the overhead of protected mode 
>(most instructions take loner to execute since they have to
>be checked for protection exceptions).  In addition there is a need
>to trap (at least) all interrupt calls and all DMA activity.
>
    Actually, 386 instructions do not take longer to execute in protected
mode, apart from the interrupt and i/o instructions that get trapped.  All
the 386's protection hardware is active all the time, even in real mode.
For example, the segment translation hardware is active in real mode, but
the segment descriptors are all initialized to look like normal 8088-style
segments.  You can get protection violations easily enough - use a 32-bit
address mode with an offset of >64k in real mode, and you exceed the
segment limit.  Paging can slow things down, but not because anything
takes longer to execute, just because address translation causes delays
when the page table entry cache misses.

 -David Hinds
  dhinds@Popserver.stanford.edu