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From: rubinoff@linc.cis.upenn.edu (Robert Rubinoff)
Newsgroups: comp.sys.mac.system
Subject: Re: RAM Chip Speed?
Message-ID: <26746@netnews.upenn.edu>
Date: 5 Jul 90 20:32:07 GMT
References: <1990Jul3.072826.1@mel.cipl.uiowa> <42654@apple.Apple.COM> <26729@netnews.upenn.edu> <1990Jul5.183212.25939@eng.umd.edu>
Sender: news@netnews.upenn.edu
Reply-To: rubinoff@linc.cis.upenn.edu (Robert Rubinoff)
Organization: University of Pennsylvania
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In article <1990Jul5.183212.25939@eng.umd.edu> russotto@eng.umd.edu (Matthew T. Russotto) writes:
>In article <26729@netnews.upenn.edu> rubinoff@linc.cis.upenn.edu (Robert Rubinoff) writes
>>[discussion of why SIMMS don't have to be (can't be) the same speed deleted]
>Why don't you talk to the apple engineer who wrote the tech note on the
>subject?  It may be misinformation, but it comes right out of the tech notes--
>#176, written by Cameron Birse...

True, but the tech note only says that the IIci requires the same speed within
a row, not the other Macs.  And I've heard this alleged requirement long before
the IIci came out.  

I have to admit, I don't understand how this could be required even for the
IIci, given that an "80ns" SIMM might really be a "40ns" or "60ns" SIMM; in
fact, the individual chips within the SIMM probably all have different speeds.
So either the tech note is wrong, or there's something going on I don't
understand; either of these is possible, of course.

   Robert