Path: utzoo!attcan!uunet!samsung!zaphod.mps.ohio-state.edu!wuarchive!mit-eddie!rutgers!rochester!uhura.cc.rochester.edu!mek4_ltd
From: mek4_ltd@uhura.cc.rochester.edu (Mark Kern)
Newsgroups: comp.sys.next
Subject: Re: RISC Coprocessor Boards
Message-ID: <8231@ur-cc.UUCP>
Date: 9 Jul 90 17:06:17 GMT
References: <112780@linus.mitre.org>
Reply-To: mek4_ltd@uhura.cc.rochester.edu (Mark Kern)
Organization: University of Rochester
Lines: 29

In article <112780@linus.mitre.org> ramsdell@mitre.org writes:
>It seems that NeXT is committed to the use of antiquated CPU's.  

	Are CISC's antiquated? I am not an engineer, but I have heard
conflicting stories in the RISC vrs. CISC debate.  A few posts back,
someone said (I'm afraid I forgot who) that the NeXT people furiously
defended CISC processors over RISC.  Are they blind, or are we (the user
public) being blinded by hoopla and hype concerning RISCs?
	For example, people have told me that you cannot compare a RISC
to CISC by comparing MIPS, because of the difference in the two
architectures. Thus, some people I know are prone to saying CISC will
give you such and such Real Mips, while RISC will give you RISC Mips. The
end result is that a RISC chip may have blindingly great MIP stats, but
actually be no faster than a CISC chip rated at half that.
	With the emergence of the 68040, I've heard that they have
preserved an extensive CISC instruction set, while getting many
instructions to execute in one cycle like a RISC.  Current RISC chips may
blow the doors off current CISC chips, but are we reaching a hybrid as in
the 68040? Is the 68040 a come-back for the CISCs? Or has RISC been a lot
of hype and exageration?

Mark Kern


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   Mark Edward Kern, mek4_ltd@uhura.cc.rochester.edu  A.Online: Markus
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