Path: utzoo!utgpu!watserv1!watmath!att!cbnewsi!yam From: yam@cbnewsi.att.com (toshihiko.yamakami) Newsgroups: comp.arch Subject: Re: Compiler Costs Message-ID: <1990Jul12.182552.26715@cbnewsi.att.com> Date: 12 Jul 90 18:25:52 GMT References: <628@dg.dg.com> Organization: AT&T Bell Laboratories Lines: 43 I have little experience on assembler coding, so I might make rather silly comments. From article <628@dg.dg.com>, by Publius@dg.dg.com (Publius): > Many of the optimization problems belong to the "NP-complete" or even > the "Turing-uncomputable" categories. Thus, no matter how smart the > global optimizer is, as long as it is equivalent to a Turing machine, > it can not achieve the FULL optimization for EVERY situation. I always wonder why human beings can do 'Turing-uncomputable' computation. If human beings can do, why can't a program simulate it? If anyone is kind enough to mail me the reason, I will appreciate it. > If a large program spends most of the CPU time in a tiny routine, then, > go ahead and hand-code it in assembler and do an exhaustive optimization, > as long as you isolate it and document it comprehensively. It is "comp.arch", so I would like to comment on RISC chips and optimization. Following discussion may not be applied to CISC. I believe it was true that hand-code in assembler was fast than compiler code in CISC era. however, some of RISC chip's instruction set is so simple, so I wonder what people can do in hand on such a code. For example, let's consider MIPS R2000(or R3000). Last year, I tried to my first assembler optimization in my life. Our group needed the enciphering performance of 1 Mbit/sec/MIPS. To achieve it, I was forced to do some hand optimization. To be honest, I don't like assembler coding(I am biased, you know :-) ). I tried to re-write compiler output code on MC68030, SPARC, R2000. I could improve performance about three times in MC68030, 5-10% on SPARC, nothing(to be honest, negativbe) on R2000. To my surprise, every time I rewrote the R2000 code, the performance was decreased, and I gave up rewriting. After that, I believe it is almost impossible to improve performance in hand-coding on some types of RISC chips. I am happy if I can hear other assembler experts's hand-coding experience on MIPS or similar RISC chips. -- Toshihiko YAMAKAMI(NTT, Japan) Resident visitor in Bell Labs until Feb 1991 Room 4G634, AT&T Bell Labs, Crawfords Corner Rd. Holmdel, NJ 07733-1988 Tel:(201)949-5742 e-mail: yam@vax135.att.com (was: yam@nttmhs.ntt.jp)