Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!tut.cis.ohio-state.edu!uc!wo!dwm From: dwm@wo.msc.umn.edu (Don Mears) Newsgroups: comp.arch Subject: Re: RISC hard to program? (was: Moto's data predicts...) Summary: RISC alignment requirements VS CISC flexibility Message-ID: <2174@uc.msc.umn.edu> Date: 19 Jul 90 21:47:29 GMT References: <3241@bnr-rsc.UUCP> <37655@ucbvax.BERKELEY.EDU> Sender: news@uc.msc.umn.edu Reply-To: dwm@msc.edu (Don Mears) Organization: Minnesota Supercomputer Center, Minneapolis, MN Lines: 17 In <37655@ucbvax.BERKELEY.EDU>, jbuck@galileo.berkeley.edu (Joe Buck) writes: >If the program, when run through lint, does not print "possible pointer >alignment problem" except for pointer values returned by malloc, and does >not generate any other lint messages, it will not crash when compiled on >another architecture because of an alignment problem. For what it's worth here are 2 programs that pass lint and run on a 68000 based Sun-3 and abort due to alignment errors on a SPARC Sun-4: main() { int i[2], *j = i; (void) printf("%d\n", *(int *) ((int)j + 2)); } union u { int i; int *ip} un; int ai[10]; main() { un.ip = ai; un.i++; (void)printf("%d\n", *un.ip); } Lint never guarantees correctness. Even still, I prefer the CPU that runs fast over the one that hides stupidisms from me.