Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!usc!jarthur!nntp-server.caltech.edu!laguna.ccsf.caltech.edu!tobi From: tobi@hobiecat.california (Tobi Delbruck) Newsgroups: comp.lsi Subject: Re: VLSI/MicroChip Design Tools Message-ID: Date: 18 Jul 90 02:38:05 GMT References: <1037@synaptx.Synaptics.Com> Sender: news@laguna.ccsf.caltech.edu Followup-To: comp.lsi Organization: California Institute of Technology Lines: 31 In-Reply-To: glenn@synaptx.Synaptics.Com's message of 11 Jul 90 21:05:46 GMT This is a followup to an article asking for VLSI design tools running on PCs. I have been doing a lot of layout recently using a program called L-Edit, which we have running on PC's, Mac II's and under X windows here in our lab. L-Edit is a geometry layout editor with built-in design rule checker that has an very ergonomic interface. It is reconfigurable to different technologies, design rules, display styles. There is no extractor yet but it is actively in the works. The drawing speed on PC's or Mac's is lightning fast -- much faster than on the X windows version. Entire tinychips can take about 2 seconds to draw, and drawing can be interrupted by mouse actions. L-Edit is pretty stable and debugged. I regularly get updates with new features. I think this is the ideal small-system tool for designing chips for submission to MOSIS. I know one guy here who was using Magic to do large CCD chips. He dropped Magic like a hot potato after he tried L-Edit. L-Edit seems like a really good value. The price for the PC version is $995. Universities get steep discounts on that. Contact Tanner Research at 818-795-1696. They'll send you a demo disk. They also have some other interesting tools that I have not personally used: a gate-level simulator with fault grading and an automatic standard cell place-and-route tool. Disclaimer: Tanner was a student in our lab.