Path: utzoo!attcan!uunet!tut.cis.ohio-state.edu!rutgers!mcnc!kk
From: kk@mcnc.org (Krzysztof Kozminski)
Newsgroups: comp.lsi.cad
Subject: Re: PLA Benchmarks
Keywords: PLA Espresso Logic-Optimization
Message-ID: <2432@speedy.mcnc.org>
Date: 19 Jul 90 13:10:56 GMT
References: <55@gypsy.ims.fhg.de>
Reply-To: kk@mcnc.org.UUCP (Krzysztof Kozminski)
Distribution: all
Organization: MCNC; RTP, NC
Lines: 19

In article <55@gypsy.ims.fhg.de> clawin@gypsy.ims.fhg.de (Detlef Clawin) writes:
|In "Logic Minimization Algorithms for VLSI Synthesis", by R. Brayton ....
|dealing with "espresso" several Berkeley PLA benchmarks are referenced, 
|e.g. ADD6, ADR4, ALU1. They are commonly referenced by other authors
|for benchmarking logic optimization tools.
|
|Does anybody know about a source for this benchmarks ore other
|commonly used benchmarks ?

Some of these (and a number of others) are available by anonymous
ftp from mcnc.mcnc.org.  Look in the directory pub/benchmark/synth89
and its subdirectories.  I believe also that all benchmarks references
in the book you mention are included on the Berkeley software
distribution tapes.

KK
-- 
Kris Kozminski   kk@mcnc.org
"The party was a masquerade; the guests were all wearing their faces."