Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.amiga
Subject: Re: Whats wrong with self Modifying Code?
Message-ID: <13256@cbmvax.commodore.com>
Date: 17 Jul 90 20:27:17 GMT
References: <6180@helios.ee.lbl.gov> <31727@cup.portal.com>
Reply-To: daveh@cbmvax (Dave Haynie)
Distribution: na
Organization: Commodore, West Chester, PA
Lines: 29

In article <31727@cup.portal.com> Sullivan@cup.portal.com (sullivan - segall) writes:

>The 68040 snoops the address bus for writes to cached memory, and updates
>the cache it is sees any.  (I.e: you shouldn't ever have to flush the 
>cache on any processor >= 68040.)  

The 68040 can be set up to snoop the CPU bus in a system.  This kind of bus
snooping is a real good idea for fully snooped system designs, but can't
always be used as drop-in to any existing system.  However, this kind of 
snooping does NOT imply that the 68040 will snoop itself -- eg, it doesn't
necessarily follow that the I-cache will be invalidated by an aliased 
write to D-space.

Interestingly enough, several years ago, before the MC68851 was released,
Commodore was working on a cache+MMU chipset.  It was never completed, but
promised to deliver a 0 wait 2K logical cache to a 16MHz 68020 with snooped,
copyback capability and burst fetches.  The internals were different, and 
the cache was of course a unified logical 2-set associative cache rather than
separate physical 4-set associative caches, but it did wind up looking a
little more like the 68040, at least philosophically, than one might have 
expected.

>                           -Sullivan Segall


-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
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	"I have been given the freedom to do as I see fit" -REM