Path: utzoo!attcan!uunet!tut.cis.ohio-state.edu!boa.cis.ohio-state.edu!petros
From: petros@boa.cis.ohio-state.edu (Somebody get me a Doctor)
Newsgroups: comp.sys.ibm.pc.hardware
Subject: Re: Whis is fastest 386/33 or 486/25 ?
Message-ID: <82203@tut.cis.ohio-state.edu>
Date: 17 Jul 90 17:23:35 GMT
References: <2447@mindlink.UUCP> <1990Jul16.054325.2190@brolga.cc.uq.oz.au>
Sender: news@tut.cis.ohio-state.edu
Reply-To: Somebody get me a Doctor <petros@cis.ohio-state.edu>
Organization: Ohio State University Computer and Information Science
Lines: 33

In article <1990Jul16.054325.2190@brolga.cc.uq.oz.au> ant@brolga.cc.uq.oz.au (Anthony Murdoch) writes:
>a516@mindlink.UUCP (Jordan Melville) writes:
>>In article <217@news.nd.edu>, laughner@news.nd.edu (Tom laughner) wrote:
>>> There would be no difference in speed between a 386 with a math
>>> coprocessor and a 486.  The 486 chip is a 386 + the math coprocessor in
>>> one.  Intel considers the 486 as a part of the 386 family.
>
>>Although this may be true, you forget that the 486 has 8k of cache right on the
>>processor, plus the chip IS more efficient that a 386+387 chip. The times
>>should be close, but measurably different.
>
>Doesn't the i486 use a pipeline mechanism for instruction loading ?
>
According to Lewis C., Eggebrecht in Interfacing to the IBM Personal COmputer.

The following summary of 486 enhancements are quoted from the above book

- addition of the 897 coprocessor [as noted in previous article]

- Addition of an 8K instruction and data cache system

- modification of the bus interface to support single clock burst data
  transfers (16 bytes in five clock cycles)

- Support for a second-level cache.

The book goes on to say that a 486 is about twice as fast as a 386 at the
same clock rate. The primary improvement being the floating point processor.
Other reasons include instruction queue(32-byte), burst mode bus operation,
integrated cache, reduced number of clock cycles per instruction and rated
clock speeds rumored to go as high as 50MHz.

barry