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From: rbn@umd5.umd.edu (Ron Natalie)
Newsgroups: comp.arch,comp.sys.intel
Subject: Re: i860 flush instruction obscurities - HELP!
Message-ID: <6900@umd5.umd.edu>
Date: 18 Jul 90 03:03:42 GMT
References: <15194@thorin.cs.unc.edu>
Organization: BDS Systems, Sterling, VA
Lines: 9

You must flush the entire cache on the 860.  I'm not sure what you
are trying to acheive by only trying to flush part of the cache.
It is not FIFO.  Second, there are allsorts of chip bug voodoos
with regard to cache flush.  Make sure that you have the erratta
sheet for your processor. Third, if the message buffer can be
put in a page in memory that you wouldn't want cached anyway, why
not just leave the cache disabled on that page?

-Ron