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From: Don_A_Corbitt@cup.portal.com
Newsgroups: comp.arch,comp.sys.intel
Subject: Re: i860 flush instruction obscurities - HELP!
Message-ID: <31857@cup.portal.com>
Date: 18 Jul 90 16:11:51 GMT
References: <15194@thorin.cs.unc.edu> <6900@umd5.umd.edu>
Organization: The Portal System (TM)
Lines: 16

> You must flush the entire cache on the 860.  I'm not sure what you
> are trying to acheive by only trying to flush part of the cache.
> It is not FIFO.  Second, there are allsorts of chip bug voodoos
> with regard to cache flush.  Make sure that you have the erratta
> sheet for your processor. Third, if the message buffer can be
> put in a page in memory that you wouldn't want cached anyway, why
> not just leave the cache disabled on that page?
> 
> -Ron

Although the PRM appears to be silent on this issue, the i860 Microprocessor
Architecture book (Neal Margulis, Osborne-McGraw-Hill, ISBN 0-07-881645-9)
says you can flush pieces of the cache, such as for self-modifying code.
---
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