Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!rutgers!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.mac.hardware
Subject: Re: Addressable memory of 68000 (was Re: New Macs)
Message-ID: <13297@cbmvax.commodore.com>
Date: 19 Jul 90 17:04:36 GMT
References: <316@opusc.CS.SCAROLINA.EDU> <1990Jul4.003731.336@hellgate.utah.edu> <26708@netnews.upenn.edu> <1990Jul5.063108.14564@chinet.chi.il.us> <1782@nvuxr.UUCP>
Reply-To: daveh@cbmvax (Dave Haynie)
Organization: Commodore, West Chester, PA
Lines: 23

In article <1782@nvuxr.UUCP> ccw@nvuxr.UUCP (22456-christopher wood) writes:
>In article <1990Jul5.063108.14564@chinet.chi.il.us> magik@chinet.chi.il.us (Ben Liberman) writes:

>The 68000 had 24 bit address (16 M addresses), (Hmm, doesn't the processor
>also have 16 bit data paths, so that it could address 32 M 8-bit bytes?)

The 68000, like all of the 680x0 family, are address memory in terms of bytes,
not words.  So the 16M of address space handles 16M 8-bit bytes.  This design
allows characters to be handled as first class objects (play with a DEC-20
for awhile to see what happens with characters on word-addressed machines),
and it makes the actual data bus width an implementation detail.  The actual
68000 chip provides 23 address lines (A1-A23), plus two data strobes (UDS*,
LDS*) which serve to select the byte(s) of interest out of a word.  The 68020
and 68030 have a much more sophisticated mechanism for addressing data.

>Chris Wood     Bellcore     ...!bellcore!nvuxr!ccw
>                         or nvuxr!ccw@bellcore.bellcore.com


-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
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	"I have been given the freedom to do as I see fit" -REM