Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!cs.utexas.edu!uunet!pilchuck!ssc!markz
From: markz@ssc.UUCP (Mark Zenier)
Newsgroups: sci.electronics
Subject: Re: Is PC parallel port latched?
Message-ID: <905@ssc.UUCP>
Date: 15 Jul 90 19:50:25 GMT
References: <33965@ut-emx.UUCP> <1990Jul15.014354.12657@ux1.cso.uiuc.edu> <15568@ucsd.Edu>
Organization: SSC, Inc., Seattle, WA
Lines: 16

In article <15568@ucsd.Edu>, brian@ucsd.Edu (Brian Kantor) writes:
> The IBM technical reference manual shows an LS374 in there, which is an
> 8-bit latch.  The data lines are latched, but there's an LS244 reading
> them back in when you read from the port so that you can perform a
> self-test by reading back the byte you had just output.
> 
> Thus you can make the port bi-directional if you want.  Just chop the
> wire from the latch's output enable pin, and run it out to a spare pin
> on the connector.  The external device would control the direction.

In a old TTL implementation, you can also route the output enable to an 
unused bit in the control register.  This is a configuration jumper on
some boards.  There was a article 2-3 years ago in Computer Shopper
giving the gory details.

Markz@ssc.uucp