Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!mcgill-vision!snorkelwacker!apple!usc!zaphod.mps.ohio-state.edu!uakari.primate.wisc.edu!aplcen!uunet!crdgw1!crdos1!davidsen From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) Newsgroups: comp.arch Subject: Re: Is handling off-alignment important? (was Re: RISC hard to program?) Message-ID: <2357@crdos1.crd.ge.COM> Date: 23 Jul 90 12:19:55 GMT References: <104037@convex.convex.com> <8840014@hpfcso.HP.COM> Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen) Organization: GE Corp R&D Center, Schenectady NY Lines: 24 In article <8840014@hpfcso.HP.COM> dgr@hpfcso.HP.COM (Dave Roberts) writes: | What if page 2 is paged out? When does the CPU notice that it's paged | out and what does it do about it? Does it abort the transaction | entirely, bring page 2 back in, and restart? If so, what if, because | of the page replacement algorithm, page 1 gets blown away by bringing | in page 2? You simply restart the instruction. Using an LRU scheme the 1st page would not get paged out unless the physical mapping was 1 page/process. As a reasonable constraint you want 8 pages/process anyway, so you avoid this. Note 1: yes "simply" is a relative term in this case, relative to doing half the instruction and then handling the fault. Note 2: pages for code, stack, source of copy instruction, dest of copy instruction. If you allow unalligned access you need two pages in each area to handle access over a boundary, that totals eight. No, I wouldn't want to actually run a system with that little memory. -- bill davidsen (davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen) "Stupidity, like virtue, is its own reward" -me