Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uwm.edu!uwvax!uwslh!jiml From: jiml@uwslh.slh.wisc.edu (James E. Leinweber) Newsgroups: comp.arch Subject: Re: Moto's data predicts 68040 performance well below 20 MIPS Message-ID: <1990Jul24.053600.8427@uwslh.slh.wisc.edu> Date: 24 Jul 90 05:36:00 GMT References: <40088@mips.mips.COM> <14900009@hpdmd48boi.hp.com> <13266@cbmvax.commodore.com> <40231@mips.mips.COM> Organization: Wisconsin State Laboratory of Hygiene Lines: 18 paulr@mips.COM (Paul Richardson) writes: >And do not forget that the Vax 11/780 is technically not a 1 mips machine. Sigh. I don't have hard data on the relative merits of Vax, IBM and other MIPS, but I first started seeing this canard when some trade press idiot divided the clock rate by the average cycle count of the instruction set. This is, of course, totally bogus. You have to pay attention to the pipeline depth and weight the cycle counts according to relative frequency of use, interlock delays, etc. In short, on something the complexity of a Vax, you have to run a performance benchmark. I haven't kept up with the SPEC ratings of IBM versus DEC boxes; would someone care to follow-up with real numbers? Jim Leinweber (608)262-0736 State Lab. of Hygiene/U. of Wisconsin - Madison jiml@sente.slh.wisc.edu uunet!uwvax!uwslh!jiml fax:(608)262-3257 -- Jim Leinweber (608)262-0736 State Lab. of Hygiene/U. of Wisconsin - Madison jiml@sente.slh.wisc.edu uunet!uwvax!uwslh!jiml fax:(608)262-3257