Path: utzoo!attcan!uunet!samsung!usc!ucsd!ames!amdcad!mozart.amd.com!nucleus!davec
From: davec@nucleus.amd.com (Dave Christie)
Newsgroups: comp.arch
Subject: Re: RS/6000 renaming
Message-ID: <1990Jul26.160540.15289@mozart.amd.com>
Date: 26 Jul 90 16:05:40 GMT
References: <1990Jul23.182546.25777@mozart.amd.com> <37240@shemp.CS.UCLA.EDU> <1990Jul25.172053.27085@mozart.amd.com> <37269@shemp.CS.UCLA.EDU>
Sender: usenet@mozart.amd.com (Usenet News)
Reply-To: davec@nucleus.amd.com (Dave Christie)
Organization: Advanced Micro Devices, Inc., Austin, Texas
Lines: 15

In article <37269@shemp.CS.UCLA.EDU> marc@oahu.cs.ucla.edu (Marc Tremblay) writes:
>
>A full cycle seems to be allocated for register renaming. That's plenty
>of time to access the map table and manage the tag lists. I suspect that
>they may even do it twice per cycle to reduce the number of ports
>of the map table. Indeed if two instructions can be renamed per cycle,
                             ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>and if both are FMA (Fused multiply and add) which require 3 source
>tags and one destination tag, that's 8 ports/cycle for the mapping table.

Are you implying that two FP instructions can be issued in one cycle?!
I don't believe this is the case.

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Dave Christie          My opinions only.