Path: utzoo!dciem!array!colin
From: colin@array.UUCP (Colin Plumb)
Newsgroups: comp.arch
Subject: Re: High-Priority Instructions
Message-ID: <303@array.UUCP>
Date: 26 Jul 90 14:01:33 GMT
References: <58428@bbn.BBN.COM>
Organization: Array Systems Computing, Inc., Toronto, Ontario, CANADA
Lines: 11

I think that bit is just a trifle implementation-specific; a more
intelligent arbitration scheme would ignore it again.

How about write buffers between the functional unit outputs and the
register file?  The 29000 does this with async loads.  In fact, it is
always holding some register in the write buffer, because the only
write-back slots it uses are the ones from subsequent load
instructions... which, coincidentally, are the only instructions that
need to have the write buffer emptied!
-- 
	-Colin