Path: utzoo!attcan!uunet!cs.utexas.edu!usc!snorkelwacker!spdcc!esegue!compilers-sender From: lupine!rfg@uunet.UU.NET (Ron Guilmette) Newsgroups: comp.compilers Subject: Re: Register Allocation and Aliasing Keywords: code, optimize, analysis Message-ID: <1990Jul19.182014.6769@esegue.segue.boston.ma.us> Date: 19 Jul 90 18:20:14 GMT References: <1990Jul14.222431.13761@esegue.segue.boston.ma.us> Sender: compilers-sender@esegue.segue.boston.ma.us Reply-To: lupine!rfg@uunet.UU.NET (Ron Guilmette) Organization: Network Computing Devices, Inc., Mt. View, CA Lines: 40 Approved: compilers@esegue.segue.boston.ma.us In article <1990Jul14.222431.13761@esegue.segue.boston.ma.us> Preston Briggs writes: >Andy Glew writes: >>> Hare brained idea: allocate quantities that *might* be aliased to >>>registers anyway. Provide a register to contain the true memory >>>address of the aliased quantity, which causes a trap when the address >>>is accessed (or automagically forwards to/from the register). Not >>>only are aliasing problems avoided, but you've got a set of data >>>address breakpoint registers as well! ... >And Ron Guilmette replied: >>Actually, this sounds like a marvelous idea to me! >... >>Having a machine that did this stuff would effectively render alias analysis >>(in compilers) "impotent and obsolete". >I disagree. Alias analysis has many uses during optimization... Who am I to disagree with sombody from Rice (especially Preston)? :-) Preston's examples do in fact totally demolish my argument that clever hardware could render alias analysis unnecessary. Obviously, a good optimizing compiler will always need to do hefty analysis of the code being compiled in order to understand which transformations can and cannot be done (safely). Nontheless, I think that there might still be a place for the hardware scheme we were discussing. Although a compiler for such a machine would still need to be pretty smart if it wanted to produce really good code, the hardware scheme proposed for dealing with potential aliasing could still allow an optimizing compiler to keep some values in registers over a larger range than it could otherwise. -- // Ron Guilmette (rfg@ncd.com) -- Send compilers articles to compilers@esegue.segue.boston.ma.us {spdcc | ima | lotus| world}!esegue. Meta-mail to compilers-request@esegue.