Path: utzoo!attcan!uunet!wuarchive!cs.utexas.edu!swrinde!emory!hubcap!shashank
From: shashank@quiche.cs.mcgill.ca (Shashank NEMAWARKAR)
Newsgroups: comp.parallel
Subject: Info needed about i860 compilers
Keywords: i860, compiler, floating point, pipeline
Message-ID: <9882@hubcap.clemson.edu>
Date: 27 Jul 90 16:21:16 GMT
Sender: fpst@hubcap.clemson.edu
Reply-To: shashank@quiche.cs.mcgill.ca (Shashank NEMAWARKAR)
Followup-To: comp.arch
Organization: SOCS, McGill University, Montreal, Canada
Lines: 17
Approved: parallel@hubcap.clemson.edu

Hi,

I would like to know if there exists any compiler for i860
(research/commercial), which utilize the pipelined floating-
point load instructions (PFLD) after some analysis reveals
that it would be advantageous.

If you have any details about it, please send an email to
any of the following addresses:
shashank@quiche.cs.mcgill.ca 
shashank@pike.ee.mcgill.ca
hum@crim.ca     

Thanks in advance,

Shashank