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From: SRGHDJE@windy.dsir.govt.nz
Newsgroups: comp.periphs.scsi
Subject: Wide SCSI on NCR53C700
Message-ID: <18001@windy.dsir.govt.nz>
Date: 25 Jul 90 11:43:38 GMT
Organization: DSIR, Wellington, New Zealand
Lines: 20


We are about to start designing a system using the NCR53C700 SCSI I/O 
Processor (SIOP). This looks to be a great chip, it even has 12 pins 
that the data manual (Rev.2.5) says are "Reserved for Wide SCSI". 
Unfortunately that's about all it says with respect to future support 
for wide SCSI. Before getting on with a detailed design, board 
layout etc. it would be helpful to know what plans there are for these 
pins. Twelve pins is probably not enough to support even a 16 bit SCSI 
bus directly. Perhaps these pins will be an interface to another 
"expander" chip. Does anyone know what NCR's intentions are? Would 
anyone at NCR care to comment?

Dave Evans
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