Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!tut.cis.ohio-state.edu!rutgers!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.amiga.hardware
Subject: Re: A2630 Burst Mode?
Keywords: A2630, Burst Mode, Registers, DRAM
Message-ID: <13382@cbmvax.commodore.com>
Date: 23 Jul 90 22:07:48 GMT
References: <23779@boulder.Colorado.EDU>
Reply-To: daveh@cbmvax (Dave Haynie)
Distribution: na
Organization: Commodore, West Chester, PA
Lines: 31

In article <23779@boulder.Colorado.EDU> hunt@tramp.Colorado.EDU (Lee Cameron Hunt) writes:

>Can the A2630 achieve do burst memory transfers if you fill-out the on-board
>memory to 4 Mb?  As I recall, Burst Mode was not enabled on the A2630 because
>to do so would require each longword's bits to reside in individual DRAMs
>(for a total of 32-one Mb ZIP DRAMs), enabling memory trasfers to proceed
>in a column-wise manner.  Shipping the boards with this amount of on-board
>memory, at the time, was too expensive.  Is this correct?

That's about it.  The easiest way to support burst mode is to use nybble
mode memory (like GVP does), which comes in 1 Meg x 1 packages and has an
easy-to-implement 4 bit wrap that just about matches the 68030's burst mode.
There are other ways to manage burst mode (eg, like the A3000 does with
SCRAM memories), but nothing was very practical given the design constraints
of the A2630 -- no time for custom chips or anything on that one.

>And while I'm on the subject, can anyone summerize the operations of the
>A2630's programmable resisters (I've been told they exist but am clueless
>as to what they are for)?

The only programmable register on the A2630 disappears before AmigaOS boots.
Bit in thi register allow the ROMs to be banked out, control the effect of a 
CPU reset on the register itself, and lets the 68000 be turned back on.

>--Lee


-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
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