Path: utzoo!attcan!uunet!mcsun!unido!uniol!neumann From: neumann@uniol.UUCP (Frank Neumann) Newsgroups: comp.sys.amiga.hardware Subject: DAVE HAYNIE (and others) READ THIS - Q's about Zorro Keywords: Zorro, clock, synchronizing Message-ID: <3155@uniol.UUCP> Date: 25 Jul 90 11:38:56 GMT Distribution: comp Organization: University of Oldenburg, W-Germany Lines: 39 Hi guys, here is couple of questions from a friend of mine. If you don't understand them (I'm no hardware freak, so I can't help), feel free to mail me and I will ask him. Here it goes: 1) How can you synchronize the states of the processor clock s0 - s7 to a stable clock system on the Zorro II slot ? Is it possible to identify one of these states to make a synchronization of bus cycles on the Zorro II slot (only in the $200000-$9fffff range) ? 2) Does the system assert for its own a wait state to the Zorro II bus, or is every cycle closed to another ? 3) Is there a simple way to make a DRAM operation starting at the rising edge on s4 and ending at the rising edge of s0 ? Is it also possible to make a refresh cycle in a cycle starting with the rising edge on s0 and the falling edge on s3 ? 4) Which clock is the best to make a refresh clock with 64 KHz ? (I want to divide up the E-clock on pin 50) 5) How do I handle the 32 address and data lines on a Zorro III slot ? 6) Is it a good idea having several autoconfig's ON ONE BOARD ? (bit 4 on the autoconfig-address $00/$02 being set on the first config and the last (the second) being returned to the system ? Well, that's it. Quite hard things I suppose, 'cause I didn't understand a single of these. As I said, if there are questions, mail me, and I will forward the questions to him... but do so quickly, as I will not be at my terminal for a couple of weeks after Friday (time for vacations! :)) ANY help appreciated, and thanks in advance, Frank 'F.N.II(tm)' -- + Frank Neumann, Hauptstr. 107, 2900 Oldenburg, FRG The Amiga is it. + + neumann@uniol.uucp ZER:neumann@uniol.zer InHouse: amigo@faramir +