Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!uwm.edu!zaphod.mps.ohio-state.edu!sdd.hp.com!hplabs!hpfcso!hplisa!hpislx!bayes From: bayes@hpislx.HP.COM (Scott Bayes) Newsgroups: comp.sys.mac.hardware Subject: Re: Addressable memory of 68000 (was Re: New Macs) Message-ID: <9700002@hpislx.HP.COM> Date: 17 Jul 90 19:56:19 GMT References: <26708@netnews.upenn.edu> Organization: Measurement Systems Operation - Loveland, CO Lines: 18 > This was a design decision made on the origional 128K Macintosh. The > 68000 had 24 bit address (16 M addresses), (Hmm, doesn't the processor > also have 16 bit data paths, so that it could address 32 M 8-bit bytes?) Nope. It only has 23 address lines, and 2 auxiliary lines called BUDS and BLDS (Byte Upper/Lower Data Strobe). The 23 address lines decode 16M _words_, and BUDS provide upper or lower byte, or word access. > so they divided the address map in half, with the lower 8 M for RAM, and > the upper 8M for ROM, IO, etc. > > -- > Chris Wood Bellcore ...!bellcore!nvuxr!ccw > or nvuxr!ccw@bellcore.bellcore.com Scott Bayes Hewlett-Packard Co