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From: schwarze@isaak.uucp (Jochen Schwarze)
Newsgroups: comp.windows.x
Subject: Porting X11R4 cfb routines
Message-ID: <3073@isaak.isa.de>
Date: 27 Jul 90 18:06:17 GMT
Sender: news@isaak.isa.de
Organization: ISA GmbH, Stuttgart, West-Germany
Lines: 38


We are currently porting the MIT X11R4 Sample Server to a new
architecture and have some problems getting the cfb routines to work
correctly.

The machine has a 68020 cpu and a Hitachi 63484 ACRTC graphics
controller. This controller uses 16 bit words, LSB first. The frame
buffer memory is shared with the cpu (32 bit, MSB).

We have first tried to keep PPW == 4 and swapped the various mask
values (0x00112233 -> 0x11003322). But the bit shifting routines
still assume the bytes to be contigious in a word. We suppose this
dependency would be very hard to eliminate.

We have then tried to define the following:

    PPW     2
    PLST    1
    PIM     0x01
    PWSH    1

    BITMAP_BIT_ORDER        LSBFirst
    BITMAP_SCANLINE_UNIT    16

    IMAGE_BYTE_ORDER        LSBFirst

This still imposes lots of problems as all the 8-bit routines that
rely on PPW == 4 are no longer usable.

We would gratefully appreciate any hints that could help us with the
porting work.

Thank you very much.
--

Jochen Schwarze                     Domain: schwarze@isa.de
ISA GmbH, Stuttgart, West Germany   UUCP:   schwarze@isaak.uucp
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