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From: clt4@andrews.edu (Clarence Thomas IV)
Newsgroups: comp.arch
Subject: Sir Clive Sinclair's 200 MIP computer (Is This For Real?)
Keywords: Downloadable microcode, bipolar hyper-RISC processor, 200Mips
Message-ID: <155620021590@andrews.edu>
Date: 3 Aug 90 04:07:49 GMT
Reply-To: clt4@andrews.edu (Clarence Thomas IV)
Organization: Andrews University, Berrien Springs, Mi
Lines: 17

The July 30, 1990 issue of INFOWORLD contains an interesting paragraph on
a 200 MIP, battery powered, emulate-any-processor-you-want (downloadable
microcode) computer.  It's in the column NOTES FROM THE FIELD (by Robert X.
Cringely).  Being keenly interested in CPU instruction design/implementation,
I would appreciate further information regarding the integrity of the
paragraph.  You see, if Sir Clive Sinclair is doing what the paragraph says,
maybe, just maybe I can convince him to give me a working sample...CRAY 
emulation, 680X0 emulation, a WINDOWS 3.0 instruction set, a X-Windows
instruction set........

I read comp.arch often, but those kind enough to respond...email your
responses so I won't miss a thing.  Thanks.

Clarence Thomas IV
clt4@andrews.edu
Andrews University Computing Center
616-471-3455