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From: bobeson@saturn.ucsc.edu (Robert Ellefson)
Newsgroups: comp.arch
Subject: Re: Workstation Data Integrity
Message-ID: <5739@darkstar.ucsc.edu>
Date: 4 Aug 90 01:47:57 GMT
References: <1990Aug3.204358.330@portia.Stanford.EDU>
Sender: usenet@darkstar.ucsc.edu
Organization: University of California, Santa Cruz
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The IBM RS/6000 line has full memory ECC.  They use 40 bits/word, which
gives 7 bits for correction, and 1 unused bit.  All busses have
8-bit parity checking.

They also 'scrub' the memory, which involves periodically reading
and correcting 1-bit errors before they become uncorrectable 2-bit
errors.

For a good reference on this, see the "RS/6000 Technology" Book.

-Bob