Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!cs.utexas.edu!sdd.hp.com!decwrl!sgi!rpw3@rigden.wpd.sgi.com From: rpw3@rigden.wpd.sgi.com (Rob Warnock) Newsgroups: comp.dcom.lans Subject: Re: cheap ethernet transceivers Keywords: cheap Ethernet transceivers Message-ID: <66117@sgi.sgi.com> Date: 4 Aug 90 09:51:32 GMT References: <6Xc1m12w162w@remote.halcyon.wa.com> <1990Jul31.031438.19090@blilly.UUCP> Sender: rpw3@rigden.wpd.sgi.com Reply-To: rpw3@sgi.com (Rob Warnock) Distribution: usa Organization: Silicon Graphics, Inc., Mountain View, CA Lines: 44 In article <1990Jul31.031438.19090@blilly.UUCP> bruce@balilly.uucp (Bruce Lilly) writes: +--------------- | IC's are described in ``Handbook of LAN Technology'' by Paul J. Fortier, | published by McGraw-Hill ($64.95). The pinout of the 15-pin cable is | shown in ``Keeping the Link'' by Martin Nemzow, also published by | McGraw-Hill ($39.95). (No, I don't work for McGraw-Hill) There are other | books; check your local library or technical bookstore, as well as | application notes from the IC manufacturers. +--------------- Better still would be to read the Ethernet Specification itself (*not* 802.3!). It's quite readable, has all the actual requirements for voltages, impedances, drive currents, rise times, etc., and even has sample circuits for driving and receiving the 15-pin interface. WARNING! The sample circuit for a transceiver-cable receiver has a bug, which is in both Version 1.0 and Version 2.0 of the spec, and I have also seen it in the schematics for at least one of the DEC-manufactured transceivers. The "data valid" output of the circuit is mistakenly connected to the *center-tap* of the terminators for the incoming signal. [Boo! Hiss!] Thus common-mode signals are sent backwards up the cable. [When copying this circuit, don't do it that way. ;-} ] A friend of mine at Xerox once confided that they knew the bug was there, but couldn't change it in time because of the long review/approval cycle through the DEC/Intel/Xerox loop. When Version 2.0 was being edited, they'd forgotten just what the bug was, and removed the wrong wire, leaving only the *bad* connection! It's pretty obvious what "data valid" *should* be hooked to -- just look for a gate with no output connections. Otherwise, and on the whole, the Ethernet Spec is a *very* good guide. You also should look at the data sheets for some of the transceiver chips, such as the ones made by AMD or National. I believe these have sample circuits for complete transceivers, including hints/warnings about circuit layout to meet the stringent stray capacitance and isolation rules. -Rob ----- Rob Warnock, MS-9U/510 rpw3@sgi.com rpw3@pei.com Silicon Graphics, Inc. (415)335-1673 Protocol Engines, Inc. 2011 N. Shoreline Blvd. Mountain View, CA 94039-7311