Path: utzoo!attcan!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!samsung!rex!ames!sgi!rpw3@rigden.wpd.sgi.com
From: rpw3@rigden.wpd.sgi.com (Rob Warnock)
Newsgroups: comp.lsi
Subject: Verilog HDL vs VHDL (was: Re: Book on Verilog HDL)
Keywords: Verilog Book HDL modeling
Message-ID: <66123@sgi.sgi.com>
Date: 4 Aug 90 14:00:27 GMT
References: <140081@sun.Eng.Sun.COM> <12363@encore.Encore.COM> <66110@sgi.sgi.com>
Sender: rpw3@rigden.wpd.sgi.com
Reply-To: rpw3@sgi.com (Rob Warnock)
Organization: Silicon Graphics, Inc., Mountain View, CA
Lines: 11

Oh, and also on the subject of Verilog HDL vs VHDL, there was a
good article in mid-July in "comp.simulation" comparing the two.


-Rob

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Rob Warnock, MS-9U/510		rpw3@sgi.com		rpw3@pei.com
Silicon Graphics, Inc.		(415)335-1673		Protocol Engines, Inc.
2011 N. Shoreline Blvd.
Mountain View, CA  94039-7311