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From: keith@EXPO.LCS.MIT.EDU (Keith Packard)
Newsgroups: comp.windows.x
Subject: Re: Porting X11R4 cfb routines
Message-ID: <9007272315.AA19816@xenon.lcs.mit.edu>
Date: 27 Jul 90 23:15:08 GMT
References: <3073@isaak.isa.de>
Sender: daemon@athena.mit.edu (Mr Background)
Organization: The Internet
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> The machine has a 68020 cpu and a Hitachi 63484 ACRTC graphics
> controller. This controller uses 16 bit words, LSB first. The frame
> buffer memory is shared with the cpu (32 bit, MSB).

If you look at the MFB code, you'll find that IBM has also designed
brain-damaged hardware where the display doesn't match the CPU.  To compensate
for this, they byteswap for every shift operation to align things, shift, and
byteswap back.  You should be able to get some things working by abusing CFB in
a similar manner.  Note that this will cause your display to run quite a bit
slower as a result.  Perhaps you should redesign the hardware to have matching
endian parts (I'm only partially kidding).

But, you'll still have to hack the stippling code (including text) to arrange
the stipples in the correct order.  These changes should be reasonably
localized to cfb8bit.c and cfb8bit.h.

>     PPW     2
>     PLST    1
>     PIM     0x01
>     PWSH    1

This is definately wrong - PPW defines the number of pixels in a machine word. 
As you have 8-bit pixels on a 32-bit machine, PPW must be 4.

Keith Packard
MIT X Consortium