Path: utzoo!attcan!uunet!samsung!uakari.primate.wisc.edu!crdgw1!crdos1!davidsen
From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: Is handling off-alignment important?
Message-ID: <2392@crdos1.crd.ge.COM>
Date: 6 Aug 90 15:07:42 GMT
References: <104037@convex.convex.com> <8840014@hpfcso.HP.COM> <2357@crdos1.crd.ge.COM> <25900@mimsy.umd.edu>
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center, Schenectady NY
Lines: 27

In article <25900@mimsy.umd.edu> chris@mimsy.umd.edu (Chris Torek) writes:

| Actually, it is (or can be) even worse than that.  Consider the
| following VAX gem:
| 
| 	addl3	*0(r1),*0(r2),*0(r3)
| 
| Assume that the instruction itself (which is 7 bytes long) crosses
| a page boundary, that r1, r2, and r3 contain 0x1ff, 0x3ff, and 0x5ff
|     [ details ]
|  total 14 pages for one `simple' `addl3' instruction.

  I suspect that you could actually get something like this in actual
programs. It happens on machines which don't force the instructions to
be an even size. This is probably a worst worst case, but I could
believe that it would happen.

  There seem to be enough advantages and penalties to unalligned access
to prevent a definitive good or bad decision. Certainly it will take a
few gates on the chip, but probably will not slow alligned access. It
will be a lot faster than doing the same thing in software, but it's not
a common thing to do. There doesn't seem to be a portable way to decide
if an address is alligned or not, since pointer formats vary, so a
software solution has to assume all accesses are unalligned.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
            "Stupidity, like virtue, is its own reward" -me