Path: utzoo!attcan!uunet!cs.utexas.edu!rice!news
From: cliffc@sicilia.rice.edu (Cliff Click)
Newsgroups: comp.arch
Subject: Re: Do chip timing specs mean anything?
Message-ID: <1990Aug7.192536.14113@rice.edu>
Date: 7 Aug 90 19:25:36 GMT
References: <712@dg.dg.com> <1990Aug7.140840.14044@mlb.semi.harris.com> <10141@pt.cs.cmu.edu>
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In article <10141@pt.cs.cmu.edu> lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay) writes:
>In article <1990Aug7.140840.14044@mlb.semi.harris.com> 
>The dream of the "self timed" designs is that they will automatically
>be immune to timing problems.  Worst-cases, heat, aging, changes by
>vendors, changes of vendor - all of these are just non-problems,
>except in that the overall product's speed may occasionally surprise
>you.  Anyone out there working on these things, please let us know
>how it's going.

I know of at least 1 chip with working silicon, going to full production
(10,000 to 100,000??? parts) produced later this year using self-timed
ciruitry.  It has 1Meg bit on-board, with DRAM controller & 32-bit 
"horizontally micro-coded" controller - and the maker claims 100+ Mhz.
Not bad for a 1 chip computer (I guess you need a ROM chip, which you
download to the internal RAM, so make that 2 chips).  Anyhow they claim
huge speed with cheap (old) processes via self-timed ciruitry.

Cliff Grapevine Click


-- 
Cliff Click                
cliffc@owlnet.rice.edu