Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!uakari.primate.wisc.edu!crdgw1!crdos1!davidsen From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) Newsgroups: comp.arch Subject: Re: Is handling off-alignment important? Message-ID: <2396@crdos1.crd.ge.COM> Date: 8 Aug 90 16:43:01 GMT References: <104037@convex.convex.com> <8840014@hpfcso.HP.COM> <2357@crdos1.crd.ge.COM> <25900@mimsy.umd.edu> <2392@crdos1.crd.ge.COM> Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen) Organization: GE Corp R&D Center, Schenectady NY Lines: 15 In article mcgrath@homer.Berkeley.EDU (Roland McGrath) writes: | documented), the least useful thing I can think of for them to do (within the | bounds of reason) is to do the access wrong (which seems likely since if they | want the low-order two bits of the address to always be zero, they might well | not pay attention to them). Is this what is done? On some machines, yes. On others a trap results, allowing the kernel to complete the access in software if desired. I believe that the 88K has a flag to trap or just zero the low bits or the address, I know the Honeywell DPS series zeroed the low bit of the address on a doubleword access. This resulted in many amusing "learning experiences." -- bill davidsen (davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen) "Stupidity, like virtue, is its own reward" -me