Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!zaphod.mps.ohio-state.edu!mips!orac!cprice From: cprice@mips.COM (Charlie Price) Newsgroups: comp.arch Subject: Re: Is handling off-alignment important? Message-ID: <40696@mips.mips.COM> Date: 8 Aug 90 20:13:22 GMT References: <104037@convex.convex.com> <8840014@hpfcso.HP.COM> <2357@crdos1.crd.ge.COM> <25900@mimsy.umd.edu> <2392@crdos1.crd.ge.COM> Sender: news@mips.COM Reply-To: cprice@mips.COM (Charlie Price) Organization: MIPS Computer Systems, Inc. Lines: 10 In article mcgrath@homer.Berkeley.EDU (Roland McGrath) writes: >On machines that "don't handle misaligned accesses", what do they do when one >happens anyway? MIPS processors generate a trap with an Address Error Exception. In RISC/os, this is turned into a SIGBUS signal. -- Charlie Price cprice@mips.mips.com (408) 720-1700 MIPS Computer Systems / 928 Arques Ave. / Sunnyvale, CA 94086