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From: mash@mips.COM (John Mashey)
Newsgroups: comp.arch
Subject: Re: Is handling off-alignment important?
Message-ID: <40711@mips.mips.COM>
Date: 9 Aug 90 01:27:11 GMT
References: <MCGRATH.90Aug7220232@homer.Berkeley.EDU> <12409@encore.Encore.COM>
Sender: news@mips.COM
Reply-To: mash@mips.COM (John Mashey)
Organization: MIPS Computer Systems, Inc.
Lines: 16

In article <12409@encore.Encore.COM> jkenton@pinocchio.encore.com (Jeff Kenton) writes:
>
>On the Motorola 88000 a misaligned access causes a trap into the kernel.  There
>is a bit in the status word which can override this, in which case the CPU
>assumes zero for the appropriate number of low order bits.  Kernels can either
>signal the offending process on a fault, or complete the offending access and
>continue.

Just out of curiosity, can anyone give some live examples where software
takes advantage of the mode where the CPU just zeroes the low-oorder
bits and conitnues, as in the 88K?  (or, I think(?), in the RT/PC).
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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