Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!tut.cis.ohio-state.edu!pt.cs.cmu.edu!MATHOM.GANDALF.CS.CMU.EDU!lindsay From: lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay) Newsgroups: comp.arch Subject: Re: Is handling off-alignment important? Message-ID: <10172@pt.cs.cmu.edu> Date: 9 Aug 90 15:34:02 GMT References: <12409@encore.Encore.COM> <40711@mips.mips.COM> Organization: Carnegie-Mellon University, CS/RI Lines: 29 In article <40711@mips.mips.COM> mash@mips.COM (John Mashey) writes: >Just out of curiosity, can anyone give some live examples where software >takes advantage of the mode where the CPU just zeroes the low-oorder >bits and conitnues, as in the 88K? (or, I think(?), in the RT/PC). The optimizing compilers I used to work on, did all of their dynamic memory management though IDL (Interface Description Language). Our IDL implementation gave us nice things - garbage collection, debug support, and the ability to move any rooted data structure to/from a file. IDL objects were tagged, and tags contained a two-bit code which was stored in the low end of a pointer. The IDL runtimes had to pack and unpacked them. (Guy Steele determined which code was commonest, and represented it as 00.) Would we have used the hardware mode? No. The IDL runtimes initially consumed about half the cycles of a big compile, but I fixed that in the conventional way (amortization,inlining,caching,etc). After the fix, our cycles were elswhere, and a special hardware mode would have made no difference. Plus, I would not want to turn off the hardware checks while the rest of the code was running. If this meant constantly turning a mode on and off, then forget it. -- Don D.C.Lindsay