Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!mcgill-vision!snorkelwacker!usc!samsung!uunet!mcsun!ukc!keele!cca04 From: cca04@keele.ac.uk (P.J. Mitchell) Newsgroups: comp.sys.transputer Subject: Re: i860s and the like Message-ID: <542@keele.keele.ac.uk> Date: 9 Aug 90 10:04:36 GMT References: <8439.9008081138@prg.oxford.ac.uk> Sender: news@seq1.keele.ac.uk Lines: 45 From article <8439.9008081138@prg.oxford.ac.uk>, by ARCR1@biology.cambridge.ac.uk (Andy Raine): > 2 t800s) were saturated, and if communications can be overlapped with > calculations completely, then the vector processor would just about be busy all > the time. For the boards with only 4 links, than only 50% utilisation of the > coprocessor would be expected as a maximum. In realistic cases, data just > wont be available to the processor at these maximum rates. It's possibly true for an iterative problem where all the code/data can live in the cashe memory, but as you say the general case is an underused i860. This has been the experience, I belive, at Daresbury where they have been testing out some i860 machines and find that data cannot be brought to the i860 fast enough to satisfy it. > I suggest that what is needed for a large number of scientific calculations > is a 'fine grain' processor. In other words, if the ratio of communication > speed to compute speed of the t800 is taken to be 1:1, then what is needed > is a processor where the ratio is 10:1. The i860 & vector boards achieve a > ratio of 1:10 (The wrong way!), and the H1 transputer maintains the t800 > ratio at 1:1. Presumably then an i860 with H1's instead of t800's would get near to the 1:1 again. Of course this is not what you want, but it could be worse. Mind you by the time we get H1`s (or whatever they're to be called) we will also probably have i960's and i870's too... > If a manufacturer produced boards with a t800 coupled with link driver > hardware that ran at 10 times the speed of the t800's links, then I would > be able to use ten times as many processors, and get 10 times the > performance. What about it? I think that this is more or less the case, it's always the communications overhead that reduces the efficiency of parallelisation and so the better (faster) the communications the better your parallelisations. I still find it baffling that transputer links are a) one bit wide, and b) use one byte packets ! I would imagine simply going to 8 bit buses and using (say) 512 byte packets would increase performance dramatically. P.S. Andy, I tried to mail you the other day and got bounced. Is your mail host down ? -- --Paul Mitchell (CMA N.Cheshire, DoD#0145) | Computer Centre, JANET: cca04@uk.ac.keele.seq1 | University of Keele, Keele, USENET: cca04@seq1.keele.ac.uk@nss.cs.ucl.ac.uk | Staffordshire, ST5 5BG, U.K. BITNET: cca04%seq1.keele.ac.uk@ukacrl | 0782 - 621111 ext 3302