Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!samsung!sdd.hp.com!decwrl!shelby!neon!news From: andy@Theory.Stanford.EDU (Andy Freeman) Newsgroups: comp.arch Subject: 64 bits, but for what? Message-ID: <1990Aug13.065744.13208@Neon.Stanford.EDU> Date: 13 Aug 90 06:57:44 GMT References: <1990Aug11.203944.10478@nlm.nih.gov> Sender: news@Neon.Stanford.EDU (USENET News System) Distribution: na Organization: Computer Science Department, Stanford University Lines: 16 In article <1990Aug11.203944.10478@nlm.nih.gov> states@tech.nlm.nih.gov () writes: >Let's assume that John Mashey is correct (he usually is :-) and that we >will soon see full 64-bit microprocessors. You need 64-bits for alot >of floating point, something more than 32-bits would be nice for >adressing, sticking with factors of 2 in word size has advantages 64 bit addresses, registers (and "natural" sizes for ints and floats) are one thing, but should the instructions grow to 64 bits at the same time? How about the program counter? (How fast are programs growing and how big are they now?) -andy -- UUCP: {arpa gateways, sun, decwrl, uunet, rutgers}!neon.stanford.edu!andy ARPA: andy@neon.stanford.edu BELLNET: (415) 723-3088