Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!mcdchg!ddsw1!andyross
From: andyross@ddsw1.MCS.COM (Andrew Rossmann)
Newsgroups: comp.os.msdos.programmer
Subject: Re: Detecting an 80486
Message-ID: <1990Aug14.231931.2951@ddsw1.MCS.COM>
Date: 14 Aug 90 23:19:31 GMT
References: <26a858b9@ralf> <3817@altos86.Altos.COM>
Reply-To: andyross@ddsw1.MCS.COM (Andrew Rossmann)
Organization: ddsw1.MCS.COM Contributor, Wheeling, IL
Lines: 165

In article <3817@altos86.Altos.COM> rcollins@altos86.UUCP (Robert Collins) writes:
>But, there is plenty of software that uses this technique.  My CPU
>determination subroutine was written for ROM BIOS, and was obviously
>not intended to run under protected mode.  But the makers of these
>products that put the '386 and '486 in V8086 mode, who don't pass control
>of the invalid opcode handler back to the user program, are obviously in
>error.	If QEMM fails to do this, it is obviously in error, and will have
>numerous compatibility problems with software using this technique.

  QEMM has no problems with the technique. I abandoned the technique in
INFOPLUS when I got hold of a version that does not use invalid opcodes,
yet can still detect a '486. The big reason was because Windows 3 grabs the
interrupt at a higher privilege level. Even if your program directly
modifies (it's copy) of the interrupt table, Win3 reports that your program
has doing something nasty, and aborts it.
>
>I hope this resolves some confusion, and puts to rest any "blame" regarding
>the use of my algorithm in Virtual 8086 mode.
  I first replaced the alogorithm because I thought it was locking up
peoples computers, but I've pretty much come to the conclusion that it was
actually the NDP test that was giving problems. (Both tests were done at
the same time before returning to the main program, a situtation corrected
in INFOPLUS 1.25.)

>
>Robert Collins
>Altos Computer Systems

  What follows is the new 286/386/486 detection code. This is only that
part, the rest of it is the same as before (for those who have the original
big posting.) After that is the corrected code for the NDP correction.


;!!!!!!!
;!!! Original 286/386 detection code (modified 8/10/90)
;!!! Modified by code supplied by John Levine, apparantly from an Intel
;!!! '486 manual.
;!!!!!!!

        pushf                           ;put flags into CX
        pop     cx
        and     cx,0fffh                ;mask off upper 4 bits
        push    cx
        popf
        pushf
        pop     ax
        and     ax,0f000h               ;look only at upper 4 bits
        cmp     ax,0f000h               ;88/86 etc.. turn them on
        jz      badcpu                  ;not 286/386/486!!!
        or      cx,0f000h               ;force upper 4 bits on
        push    cx
        popf
        pushf
        pop     ax
        and     ax,0f000h
        jz      found286                ;bits are zeroed in real mode 286
.386
        mov     dx,sp                   ;save current stack position
        and     sp,not 3                ;dword align to avoid traps
        pushfd                          ;push 32 bit flag
        pop     eax
        mov     ecx,eax
        xor     eax,40000h              ;flip AC (alignment check) flag
        push    eax
        popfd
        pushfd
        pop     eax
        mov     sp,dx
        xor     eax,ecx                 ;was bit changed??
        test    eax,40000h
.286
        jz      found386                ;if not, is a 386
        mov     mCPU,f80486             ;must be a 486!!
        jmp     short CPUID_done
found286:
        mov     mCPU,f80286
        jmp     short CPUID_done
found386:
        mov     mCPU,f80386
        jmp     short CPUID_done
badcpu:
        mov     mCPU,funk               ;how'd an 8088 get this far?????
CPUID_done:
        ret


; Here is the NDP detection code


ndp:
        mov     word ptr ndp_cw,0000H
        cli

; The next three 80x87 instructions cannot carry the WAIT prefix,
; because there may not be an 80x87 for which to wait.  The WAIT is
; therefore emulated with a MOV CX,<value>! LOOP $ combination.

.287
                                        ;       CPU     NDP
        fnsave  ndp_save                ;        14     221
        mov     cx,(221-6-1)/17+1       ;         4
        loop    $                       ;  17*CX-12
                                        ;   17*CX+6

        fninit                          ;         8       8
        mov     cx,(8-0-1)/17+1         ;         4
        loop    $                       ;  17*CX-12
                                        ;     17*CX

        fnstcw  ndp_cw                  ;        14      24
        mov     cx,14h
        loop    $                       ;  17*CX-12
                                        ;   17*CX+2

        sti
        mov     ax,ndp_cw               ;<< New code
        and     ax,0f3fh                ;<< New code
        cmp     ax,33fh                 ;<< New code
        je      short ndp_01
        mov     mNDP,fnone
        ret
ndp_01:
        mov     ax,ndp_cw
        cmp     ax,03FFH
        jne     short ndp_02
        mov     mNDP,f8087
        jmp     short ndp_04
ndp_02:

.287

        cmp     ax,037FH
        jne     short ndp_05
        fld1
        fldz
        fdiv
        fld1
        fchs
        fldz
        fdiv
        fcom
        fstsw   ndp_sw
        mov     ax,ndp_sw
        and     ah,41H                  ; C3, C0
        cmp     ah,40H                  ; ST(0) = ST(1)
        jne     short ndp_03
        mov     mNDP,f80287
        jmp     short ndp_04
ndp_03:
        cmp     ah,01H                  ; ST(0) < ST(1)
        jne     short ndp_05
        mov     mNDP,f80387
ndp_04:

.8087

        frstor  ndp_save
        fstcw   mNDPCW
        ret
ndp_05:
        mov     mNDP,funk
        ret

  Andrew Rossmann
  andyross@ddsw1.MCS.COM