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From: jws@thumper.mlb.semi.harris.com (James W. Swonger)
Newsgroups: sci.electronics
Subject: Re: chips into powered sockets
Message-ID: <1990Aug14.145937.27245@mlb.semi.harris.com>
Date: 14 Aug 90 14:59:37 GMT
References: <23655@dartvax.Dartmouth.EDU>
Sender: news@mlb.semi.harris.com
Distribution: sci.electronics
Organization: Harris Semiconductor, Melbourne FL
Lines: 18

In article <23655@dartvax.Dartmouth.EDU> charles.hitchcock@dartmouth.edu (Charlie Hitchcock) writes:
>
>Is hot-swapping a chip a bad idea?  Why?  What do
>commercial chip test systems do?

 Yes. Some circuits can be damaged and you won't know if yours are susceptible
until you try. Test programs float all pins for insertion and then power up
the part. 

 All bulk CMOS ICs have four-layer devices (i.e. parasitic SCRs) present due
to the way they are fabricated. A phenomenon referred to as "latchup", the
activation of the SCR, can be triggered by power supply spikes and other
anomalous operating conditions. Once the SCR is on, you have a Vdd-Vss short
which gets worse (runs away) until the cip is thermally damaged.

 This effect is dependent on the process and layout of the part in question.
Some suppliers take measures to eliminate the latchup paths or reduce the
sensitivity of the parasitic SCR.