Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!decwrl!shelby!portia.stanford.edu!kevinw From: kevinw@portia.Stanford.EDU (Kevin Rudd) Newsgroups: comp.arch Subject: Re: RAM controller for 68k? Keywords: 68000, DRAM Message-ID: <1990Aug27.034522.3170@portia.Stanford.EDU> Date: 27 Aug 90 03:45:22 GMT References: <1990Aug24.232256.11561@xavax.com> <20449@hercules.csl.sri.com> Organization: AIR, Stanford University Lines: 14 In article <20449@hercules.csl.sri.com> caveh@csl.sri.com (Caveh Jalali) writes: >>In article <407@horizon.COM> bergan@horizon.COM (Charles Bergan) writes: >> ... recommendations for easy to use dynamic RAM controllers for the 68000. > >since you seem to be willing to live with wait states, you might consider >doing most of the work in software. I believe that Motorola has an applications note complete with schematic and software (with usual disclaimers) to accomplish this design. Also, for fancier designs (more for 030+) I believe that Samsung has some pretty fancy chips that were announced earlier this year. I think that they do the laundry and dishes while they aren't doing refreshing... -- Kevin