Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!snorkelwacker!bloom-beacon!eru!luth!sunic!mcsun!unido!mpirbn!p554mve From: p554mve@mpirbn.mpifr-bonn.mpg.de (Michael van Elst) Newsgroups: comp.sys.amiga.hardware Subject: Re: GVP Trade-in Message-ID: <1143@mpirbn.mpifr-bonn.mpg.de> Date: 26 Aug 90 14:55:32 GMT References: <589@oregon.oacis.org> <38CP09P@dri.com> <02048.002057@thiger.UUCP> Reply-To: p554mve@mpirbn.UUCP (Michael van Elst) Organization: Max-Planck-Institut fuer Radioastronomie, Bonn Lines: 34 In article <02048.002057@thiger.UUCP> skraw@thiger.UUCP (Stephan von Krawczynski) writes: >2. why is DMA so important for you? it is generally slower than the >processor-method (lets call it this way). you win nothing because you >have a whole lot of DMA going on already inside the system and processor's >running into heavy troubles sometimes, e.g. harddisk-performance is >very low while using overscan-graphics (just to mention an example). Now, true DMA can be faster than the processor. The limiting factor is _bandwidth_ and a DMA device can move a word at each cycle whereas the processor needs at least two cycles (fetch and store). The problem is that DMA has to be granted by the processor and if the processor waits during a chip memory access DMA cannot start. But, the same situation arises when fetching data with the processor. You cannot task switch or service an interrupt while waiting for chip memory access. Now why are current DMA-controllers slower ? In fact it's a software question. Does the driver read-aheads, does it limit chip memory accesses during a transfer ? >well, how about "transfer rates up to 4MB/SEC synchronous" (gvp). in fact >i have never understood this one. what do they mean? 4MBytes/sec? >i have never seen a controller/hd-combination reaching this. >4MBits/sec = 512kBytes/sec. seems to be more like the truth, but is an >absolutely ridiculous value (ALF3 makes over 200kBytes/sec more in a >standard amiga - NO processor-card installed) If you know about SCSI (and I think you do) then you can see that 4MB/sec is the data transfer rate on the SCSI bus that can be reached with the controller hardware. Real-world transfers are more limited by the drive. Regards, -- Michael van Elst UUCP: universe!local-cluster!milky-way!sol!earth!uunet!unido!mpirbn!p554mve Internet: p554mve@mpirbn.mpifr-bonn.mpg.de "A potential Snark may lurk in every tree."