Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!usc!samsung!emory!mephisto!purdue!mentor.cc.purdue.edu!l.cc.purdue.edu!cik From: cik@l.cc.purdue.edu (Herman Rubin) Newsgroups: comp.arch Subject: Re: What *should* architectural pointers point at? Message-ID: <2491@l.cc.purdue.edu> Date: 30 Aug 90 12:37:51 GMT References: <0887@sheol.UUCP> Organization: Purdue University Statistics Department Lines: 47 In article , daveg@near.cs.caltech.edu (Dave Gillespie) writes: | >>>>> On 29 Aug 90 06:00:33 GMT, mash@mips.COM (John Mashey) said: | > In article <0887@sheol.UUCP> throopw@sheol.UUCP (Wayne Throop) writes: > | >>Surely bit-granular addressing is the only sensible way to go... what | >>reasons are against it in a 64-bit world? > | > I doubt this is the only sensible way to go, but it does lead to an | > interesting exercise. > > Okay... > > You could provide two variants of the load/store instructions, one set > that trap on unaligned accesses and one set that don't (but are possibly > much slower). Why much slower? At most two items would have to be loaded, and a shift made. .................... > The only problem I can think of is that you lose bits in your > instruction word. I cringe every time I look at the 68000's > short-branch instruction that uses an 8-bit displacement measured in > bytes; instructions must fall on even addresses, so one precious bit > of the displacement is completely wasted. Now imagine a bit-addressed > 68000: four bits are wasted! We are discussing machines where the memory is sufficiently large that 32-bit addressing is inadequate. Four bits is 1/16 of an address. Most newer machines (like the 88000) > don't have this problem; they shift the displacement enough bits to > the left so that all bits are useful. You would probably want to > adopt this approach for all displacements. Accessing an aligned > double-precision float with a 16-bit offset from the frame pointer > wastes three bits now, but with bit-addressing it would waste six > bits. There are quite a few machines now which have both addresses and indices. For an index, the appropriate shifting is done. This is not new hardware. Again, we are discussing 64-bit address machines. "Wasting" even 8 bits in addressing is only 1/8 of the length of an address. -- Herman Rubin, Dept. of Statistics, Purdue Univ., West Lafayette IN47907 Phone: (317)494-6054 hrubin@l.cc.purdue.edu (Internet, bitnet) {purdue,pur-ee}!l.cc!cik(UUCP)