Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!cica!iuvax!ux1.cso.uiuc.edu!ux1.cso.uiuc.edu!aglew From: aglew@dwarfs.crhc.uiuc.edu (Andy Glew) Newsgroups: comp.arch Subject: Re: What *should* architectural pointers point at? Message-ID: Date: 30 Aug 90 18:09:43 GMT References: <0887@sheol.UUCP> <2491@l.cc.purdue.edu> Sender: usenet@ux1.cso.uiuc.edu (News) Organization: University of Illinois, Computer Systems Group Lines: 11 In-Reply-To: cik@l.cc.purdue.edu's message of 30 Aug 90 12:37:51 GMT >> You could provide two variants of the load/store instructions, one set >> that trap on unaligned accesses and one set that don't (but are possibly >> much slower). > >Why much slower? At most two items would have to be loaded, and a shift >made. You don't think 2X or 3X is much slower? Then let me sell you a CISC system - it's only 2X slower than a RISC. -- Andy Glew, a-glew@uiuc.edu [get ph nameserver from uxc.cso.uiuc.edu:net/qi]