Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!noose.ecn.purdue.edu!mentor.cc.purdue.edu!harpermh From: harpermh@mentor.cc.purdue.edu (Matthew Harper) Newsgroups: comp.arch Subject: Re: What *should* architectural pointers point at? Message-ID: <13500@mentor.cc.purdue.edu> Date: 31 Aug 90 01:38:13 GMT References: <0887@sheol.UUCP> <41167@mips.mips.COM> <3318@awdprime.UUCP> Reply-To: harpermh@medusa.cs.purdue.edu (Matthew Harper) Organization: Purdue University Lines: 15 In article <3318@awdprime.UUCP> tif@reed.UUCP (Paul Chamberlain/32767) writes: >In article daveg@near.cs.caltech.edu (Dave Gillespie) writes: >>It seems to me that a bit-addressed, aligned-accessing machine can be >>thought of as just like a byte-addressed machine with three zeros on >>the right that would have been on the left. > >Now there's an interesting thought. Why not order these 64 bits so that >the 3 on the left are the bit offset. Mere mortals would use it just like >a byte addressed machine but wizards could use those 3 bits anyway they like. > This isn't a new idea - Texas Instuments line of graphics coprocessor chips TMS34010 & TMS34020 can address bits with nearly every instruction... But, as noted previously, performance lags when access is unaligned --- even when running out of cache...