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From: rob@alice.coyote.trw.com (Robert Heiss)
Newsgroups: comp.arch
Subject: Re: CLIPPER bit test
Summary: C100 shifter is slow, use AND
Keywords: CLIPPER how-to bits
Message-ID: <26E414E2.2738@wilbur.coyote.trw.com>
Date: 4 Sep 90 20:56:02 GMT
References: <3679@goanna.cs.rmit.oz.au>
Sender: news@wilbur.coyote.trw.com (News Software)
Organization: TRW Systems Integration Group
Lines: 27

In article <3679@goanna.cs.rmit.oz.au> ok@goanna.cs.rmit.oz.au (Richard A. O'Keefe) writes:
>I can't find anything obvious in the (*old*) CLIPPER manual.

The newer C300 has the same instruction set as the older C100.

>With this scheme, the cost of the four-way dispatch is 2 conditional
>branches (irreducible) and three rotates, and the rotates are supposed
>to be single cycle, so I suppose I shouldn't complain too much.

From experimentation, on the C100 shifter instructions take a minimum of
four cycles, plus one cycle per two bits of shift distance.

Rotate by -2 is much faster than rotate by 30.  But still slower than AND.

LOADQ takes one cycle.  ALU instructions such as ANDW and ANDI take from
one to three cycles.  Untaken branches are faster than taken ones.

>But can testing a bit in a register be so _very_ costly to provide that
>it pays to leave it out of a RISC?  Surely it is asking a bit much to
>expect a compiler to rediscover tricks like the rotation trick.

Look on the bright side, CLIPPER gives you 15 fully general registers
to play with.  Finding a temporary register for the fast LOADQ-ANDW
sequence should be easy.  And it's compact too, only four bytes.

-----
Robert Heiss  rob@wilbur.coyote.trw.com