Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!mips!sgi!karsh@trifolium.esd.sgi.com From: karsh@trifolium.esd.sgi.com (Bruce Karsh) Newsgroups: comp.arch Subject: Re: Workstation Data Integrity Message-ID: <68505@sgi.sgi.com> Date: 4 Sep 90 22:39:29 GMT References: <6797.26d6edce@vax1.tcd.ie> <56qmo1w162w@zl2tnm.gp.govt.nz> <19875@crg5.UUCP> <19208@dime.cs.umass.edu> <2201@lectroid.sw.stratus.com> <68362@sgi.sgi.com> <1990Sep4.163619.24726@zoo.toronto.edu> Sender: guest@sgi.sgi.com Reply-To: karsh@trifolium.sgi.com (Bruce Karsh) Organization: Silicon Graphics, Inc., Mountain View, CA Lines: 17 In article <1990Sep4.163619.24726@zoo.toronto.edu> henry@zoo.toronto.edu (Henry Spencer) writes: >A hard failure is usually preferable to a silently wrong answer. Given that a memory system is otherwise properly designed and tested and uses modern 4Mbit DRAM memory chips, is there any evidence that memory parity makes a measurable difference in the silent wrong answer rate? The memory failure component of the silent wrong answer rate seems to be so small as to be insignificant. If the answer is no, then isn't parity just a historical and cutural artifact from the days when parity really was necessary? Bruce Karsh karsh@sgi.com