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From: p554mve@mpirbn.mpifr-bonn.mpg.de (Michael van Elst)
Newsgroups: comp.sys.amiga.hardware
Subject: Re:   GVP Trade-in
Message-ID: <1155@mpirbn.mpifr-bonn.mpg.de>
Date: 1 Sep 90 15:38:50 GMT
References: <589@oregon.oacis.org> <38CP09P@dri.com> <02048.002057@thiger.UUCP> <552@DIALix.UUCP> <02123.132132@thiger.UUCP> <11853@ogicse.ogi.edu>
Reply-To: p554mve@mpirbn.UUCP (Michael van Elst)
Organization: Max-Planck-Institut fuer Radioastronomie, Bonn
Lines: 15

In article <11853@ogicse.ogi.edu> jmeissen@ogicse.ogi.edu (John Meissen) writes:
>If you have data transfer operations going on multiple drives
>simultaneously, a properly designed DMA controller will be able to
>interleave the operations, effectively allowing them to run at the
>same time. A processor-based scheme can only handle one operation
>at a time.
I don't think that. You can multiplex the bus either with DMA or with
a processor transfer routine although DMA would be faster.

Regards,
-- 
Michael van Elst
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Internet: p554mve@mpirbn.mpifr-bonn.mpg.de
                                "A potential Snark may lurk in every tree."