Path: utzoo!utgpu!watserv1!watmath!att!rutgers!usc!zaphod.mps.ohio-state.edu!mips!prls!pyramid!cbmvax!cbmehq!babylon!rbabel From: rbabel@babylon.UUCP (Ralph Babel) Newsgroups: comp.sys.amiga.hardware Subject: Re: GVP Trade-in Message-ID: <03423.AA03423@babylon.UUCP> Date: 31 Aug 90 22:47:22 GMT References: <589@oregon.oacis.org> <38CP09P@dri.com> <02048.002057@thiger.UUCP> <552@DIALix.UUCP> <02123.132132@thiger.UUCP> Lines: 83 To DMA or not to DMA ... In article <02123.132132@thiger.UUCP> skraw@thiger.UUCP (Stephan von Krawczynski) writes: > the problem is: if dma-transfer from controller to > fast-ram takes place, is the processor able to access this > fast-ram at the same time? As I said before: During DMA to the on-board RAM, the GVP controller does not block the Zorro-II bus. > for if it is not, your processor will do ABSOLUTELY > nothing, because it's cut off the bus (with exception of > real weird programs that have the luck to be inside the > instruction cache when dma starts and need no data from > "outside"-world). Zorro-II bus arbitration is faster than task-switching. > what does it help if the data bursts in from your harddisk > and the controller isn't able to put it to your mem > (somehow). Let's do some math: If a controller doing programmed I/O can access the data port on consecutive addresses, then the fastest way to transfer data is: READ: MOVE.L (Ax),(Ay)+ ;20 cycles WRITE: MOVEM.L (Ay)+,REGLIST ;12+8n cycles MOVEM.L REGLIST,(Ax) ; 8+8n cycles Usually you cannot use MOVEM for reads because the MC680x0 does a one-word prefetch (memory to register) which would kill a data word (you _could_ fix that in hardware). You can use at most 14 registers for the MOVEM, since you need a source register and you probably want to keep your stack pointer. On a 7-MHz 68000 (e.g. Standard-Amiga), this results in maximum transfer rates of ... 1.4 MB per second for READ ( 20 cycles for 4 bytes) 1.6 MB per second for WRITE (244 cycles for 56 bytes) ... NOT COUNTING _ANY_ OVERHEAD! BTW: The german ALF3-ad claims "up to 2 MB per second". >> At the Zorro II bus speed of about 3.5 MHz, this would > > 3.5 MHz? Let's call it the "byte frequency" (at 4 cycles per word). > you have to take the bus-arbitration into consideration. A clever DMA controller doesn't arbitrate for and release the bus on each and every 16-bit word. >> You can also connect more than one drive without "choking" >> on the bus, especially during overlapping seeks and >> transfers. > > what do you want to say here, i don't understand this. Fast and short bursts keep the SCSI bus available for other devices (DISCONNECT). > i do not measure a controllers performance via filesystem. > there are tests (i use speedtest, comes with all > ALF-controllers) that measure the real > device-/controller-performance ((read-)throughput). Wasn't it you who insisted on "real-world" performance measurements. "DiskPerf" (DOS-level) is much closer to that! Ralph cbmvax.commodore.com!cbmehq!babylon!rbabel "If you keep your mind sufficiently open, people will throw a lot of rubbish into it."