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From: scott@pita.cns.ucla.edu (Scott Burris)
Newsgroups: sci.electronics
Subject: Re: Advice needed on wire-wrapping CPU based circuits
Keywords: wire-wrap advice needed
Message-ID: <1019@lee.SEAS.UCLA.EDU>
Date: 31 Aug 90 23:17:58 GMT
References: <409@horizon.COM>
Sender: news@SEAS.UCLA.EDU
Reply-To: scott@pita.cns.ucla.edu.UUCP (Scott Burris)
Organization: UCLA Campus Network Services
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In article <409@horizon.COM> kevin@horizon.COM (Kevin Criqui) writes:
>
>I'm in the process of prototyping a small computer with a MC68000, some
>EPROM, a duart and (hopefully), 8 megs of DRAM.  I've wire-wrapped the
>circuit on a piece of perf board.  In trying to get the DRAM controller
>working, I found that the 8 MHz system clock is quite noisy.  In fact,
>if I look closely on the scope, I can see an occasional pulse of 2-2.5
>volts during the time when the clock should be low.  The logic analyzer
>confirms this, showing occasional glitches on the clock line.  I'm
>fairly certain these glitches are causing the troubles I'm having with
>the DRAM controller (a National Semiconductor 8421A).
>
>I've tried beefing up the power and gound lines and have made sure
>there are 0.1 uF bypass caps on all the chips with almost no luck.
>Does anyone out there have any advice for me?  If you've successfully
>wire wrapped a CPU based circuit that ran at 8 MHz (or higher), I'd
>like to hear how you did it.
>

I've put together a number of wire wrap boards with MC68000 and MC68020
CPU chips with up to 4 Meg of memory running at clock rates up to 12.5 Mhz.
I used to have a lot of problems getting the memory array to work reliably.
The clock glitches are a new one on me.  I used to use a XTAL Osc plugged into
a 14 pin socket with the output going to a 74S04 inverter.  The output of the
inverter was always what was used as the master clock source.
As far as wire wrapped memory arrays go, I've had luck with the following:

Organize the array as 9 chips by N, where N is 2, 4, etc depending on memory
size.  On the wirewrap side of the board, run power and ground lines to each
set of 9 chips.  Stick 0.1uf mono ceramic caps at least every 2 chips.  Stick
bigger tantalum electrolytic caps at each side of each set of 9 chips.
Wire wrap across the power and ground busses forming a complete grid of
power.  Use 22 ohm resistors from the DRAM address mux to the address lines.
Generally, this has worked pretty well.  This assumes you're using DIP's for
the memory.  I've also experimented wrapping to SIMM sockets and have found
that the SIMM's seem to be more forgiving of noisy environments.

On the historical side of things, back in 1977 (I think) I used to have
a 16K dynamic memory boards using 4KX1 chips for my Altair 8800b computer.
In order to get it to work reliably, I taped aluminum foil to both sides
of the memory board (insulating it of course), and grounded it.  Worked
like a charm.




until
--
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Scott Burris
UCLA Campus Network Services
cnetslb@oac.ucla.edu (213) 206-4860